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BEGIN:VEVENT
DTSTART:20250508T140000Z
DTEND:20250508T150000Z
DTSTAMP:20260419T074029
CREATED:20250417T151417Z
LAST-MODIFIED:20250417T151417Z
UID:30137-1746694800-1746698400@hdpusergroup.org
SUMMARY:Materials #7 meeting
DESCRIPTION:Meeting 
URL:https://hdpusergroup.org/event/materials-7-meeting-42/
CATEGORIES:Materials #7
ORGANIZER;CN=HDP:mailto:webmaster@hdpug.org
END:VEVENT
BEGIN:VEVENT
DTSTART:20250508T150000Z
DTEND:20250508T160000Z
DTSTAMP:20260419T074029
CREATED:20250425T192535Z
LAST-MODIFIED:20250425T192535Z
UID:30216-1746698400-1746702000@hdpusergroup.org
SUMMARY:D Coupon/IST/CITC Reliability Testing
DESCRIPTION:Printed circuit board through-hole via and microvia reliability are continuing concerns in the electronics industry. The industry is using smaller and higher aspect ratio vias and microvias\, and the selection of the optimum assembly reflow cycle is more critical. Although D-Coupon\, IST and CITC testing are each good standard test methods for making relative material\, design and construction comparisons\, they may vary in their correlation with the actual board assembly reflow cycle used. \nSeveral High Density Packing (HDP) User Group member companies have proposed a project to measure and compare the reliability test results of D-coupon (OM) testing with the industry standard IST/CITC test results for determining possible correlations. The initial draft proposal has at least two different board assembly reflow temperature excursion cycles as preconditioning to be used. Because for both IST and CITC the current-induced heating is more localized\, some difference in stress are expected compared with D-coupon testing. The scope for this new project may include just through-hole via reliability or also some more commonly used 0.25 mm pitch stacked or staggered microvia constructions used in aerospace applications. 
URL:https://hdpusergroup.org/event/d-coupon-ist-citc-reliability-testing/
CATEGORIES:Staff Calendar
ORGANIZER;CN=HDP:mailto:webmaster@hdpug.org
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BEGIN:VEVENT
DTSTART:20250508T160000Z
DTEND:20250508T170000Z
DTSTAMP:20260419T074029
CREATED:20250424T180549Z
LAST-MODIFIED:20250424T180549Z
UID:30213-1746702000-1746705600@hdpusergroup.org
SUMMARY:TCE materials-validating test methods for X-Y CTE
DESCRIPTION:There has been multiple studies related to the TCE of laminate materials as related to the Z-axis. However\, the hypothesis is that better dimensional properties of laminates in the X-Y axis is equally critical and will positively affect solder joint reliability. A relative comparison of laminates is needed. SAC 305 alloy and SnPb will be evaluated as part of the project. Project team will select the harshest test parameters. Test vehicle will include a dimensional test coupon and features to assemble CABGA 192 components (package size 14mm X 14mm). The project will also consider evaluating a larger BGA to compare to the CABGA. \nThe project will evaluate several materials that have significant differences in the TCE in X-Y and Z axis. In addition\, glass cloth styles and thickness may also play a role in the XY expansion. The Project team will also select several glass styles as part of the evaluation. \nWhat is the problem to be solved? Does X-Y CTE variations positively or negatively affects reliability.  \n  
URL:https://hdpusergroup.org/event/tce-materials-validating-test-methods-for-x-y-cte/
CATEGORIES:TCE Materials Dimensional Properties
ORGANIZER;CN=HDP:mailto:webmaster@hdpug.org
END:VEVENT
BEGIN:VEVENT
DTSTART:20250508T170000Z
DTEND:20250508T180000Z
DTSTAMP:20260419T074029
CREATED:20250424T152756Z
LAST-MODIFIED:20250424T152756Z
UID:30211-1746705600-1746709200@hdpusergroup.org
SUMMARY:Single Surface Finish 2
DESCRIPTION:Meeting 
URL:https://hdpusergroup.org/event/single-surface-finish-2-10/
CATEGORIES:Single PCB Surface Finish for Soldered & Compression Contact Pads – 2
ORGANIZER;CN=HDP:mailto:webmaster@hdpug.org
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